Volume-3 (International Conference on Electrical, Information and Communication Technologies (ICEICT -2017))
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Paper Type | : | Research Paper |
Title | : | A Review of Antenna Design for Millimeter Wave Range |
Country | : | India |
Authors | : | S. Praveena || B.Murugeshwari || U.Surendar || R. Kayalvizhi |
Abstract: Due to great demand on data rate and bandwidth utilization in RF communication systems, recent research studies leads to the development of millimeter wave frequency range i.e. 30Ghz to 300 GHz. This paper focused on reviewing various millimeter wave antenna design and comparing the antenna parameter. These antennas were designed using various simulators such as HFSS, ADS and CST.
Keywords - Millimeter wave spectrum, antenna, and 5G technology..
GHz Band", IEEE Transaction on Antennas and Propagation, 2017.
[2]. Farhan Ahmad, Dr. BoutheinaTlili "Design and Analysis of Millimeter Wave Double F Slot Patch Antenna for future 5G Wireless
Communications" International Conference on Electrical and Computing Technologies and Applications (ICECTA), 2017
[3]. Jyoti Saini, S. K. Agarwal "Design a Single Band Microstrip Patch Antenna at 60 GHz Millimeter Wave for 5G Application",
International Conference on Computer, Communications and Electronics (Comptelix),July 2017
[4]. Beenish, TriptiSaraswat, Malay RajanTripathy and GarimaMahendru "Design of a High Gain 16 Element Array of Microstrip Patch
Antennas for Millimeter wave applications'",2nd International Conference on Contemporary Computing and Informatics
(ic3i),2016.
[5]. Osama M. Haraz, Mohamed Mamdouh M. Ali, Saleh Alshebeili, Abdel-RazikSebak, "Design of a 28/38 GHz Dual-Band Printed
Slot Antenna for the Future 5G Mobile Communication Networks", IEEE Transaction on Antenna and Propagation,2015.
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Paper Type | : | Research Paper |
Title | : | Analysis of LUT Faults in SRAM Based FPGA Design Using BIST |
Country | : | India |
Authors | : | Chitra.A || Anjana.J || Vijay Murugan.S |
Abstract: FPGAs have become popular in present because of its features like high logic capacity, configurability and regular architecture with low area cost. However, FPGAs are prone to faults, testing is one of the important process for designers. Hence, the best method for testing faults in FPGAs is Built-In Self-Test (BIST). BIST is a design technique that allows a system to test itself .The proposed method of a BIST design for fault detection and fault diagnosis of Static-RAM (SRAM) based FPGAs can testLookup Tables (LUTs) in the Configurable Logic Blocks (CLBs).There are three major blocks in the system to detect and diagnose the faults. They are Test Pattern Generator (TPG), Output Response Analyser (ORA) and Block Under Test(BUT)........
Keywords BIST, LUT, TPG, ORA.
[1] Low-Power Scan-Based Built-In Self-Test Based on Weighted Pseudorandom Test Pattern Generation and Reseeding Dong Xiang, Senior Member, IEEE, Xiaoqing Wen, Fellow, IEEE, and Laung-Terng Wang, Fellow, IEEE.2016.
[2] A Reconfigurable Scan Architecture With Weighted Scan-Enable Signals for Deterministic BIST Dong Xiang, Senior Member, IEEE, Yang Zhao, KrishnenduChakrabarty, Fellow, IEEE, and Hideo Fujiwara, Fellow, IEEE,2008.
[3] M. Chatterjee and D. K. Pradhan, "A BIST pattern generator design for near-perfect fault coverage," IEEE Trans. Comput., vol. 52, no. 12, pp. 1543–1558,Dec 2003.
[4] A. S. Abu-Issa and S. F. Quigley, "Bit-swapping LFSR and scan-chain ordering: A novel technique for peak- and average-power reduction in scan-based BIST," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 28, no. 5, pp. 755–759, May 2009.
[5] S. Banerjee, D. R. Chowdhury, and B. B. Bhattacharya, "An efficient scan tree design for compact test pattern set," IEEE Trans. Comput.- Aided Des. Integr. Circuits Syst., vol. 26, no. 7, pp. 1331–1339, Jul. 2007.
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Paper Type | : | Research Paper |
Title | : | Analysis of Substrate Integrated Waveguide Antennas |
Country | : | India |
Authors | : | P. Pavithra || B. Murugeshwari || U. Surendar || R. Kayalvizhi |
Abstract: This study aim to provide the overview of substrate integrated waveguide antennas. Substrate integrated waveguide (SIW) technology acts as a bridge between planar and non-planar technology which is very favorable for the development of components operating at microwave and millimeter wave band. Nowadays SIW has very emerging technology because of high power handling capabilities, low radiation losses, low conductor loss and fabrication of SIW structure is very simple. The main reason we go to SIW, it
offers simple and cheap to implement a waveguide to a printed circuit board..
Keywords: substrate integrated waveguide (SIW), microwave and millimeter wave band.
[1] Hemendra Kumar, Ruchira Jadhav, Sulabha Ranade, "A Review on Substrate Integrated Waveguide and its Microstrip
Interconnect," IOSR Journal of Electronics and Communication Engineering, Vol. 3, Issue 5 (Sep. – Oct... 2012), PP 36-40.
[2] M. Bozzi, A. Georgiadis, K. Wu, "Review on Substrate Integrated Waveguide circuits and antenna," IET Microwave, Antenna &
propag, Vol. 5, No. 8, pp. 909-920, June 2011.
[3] F. Mira et al., "Efficient design of SIW filters by using Equivalent circuit models and calibrated space mapping optimization",
Intern. Journal RF Microwave Computer-aided Eng., vol. 20, No. 6, pp. 689-698, Nov. 2010.
[4] D. Deslandes, "Accurate modeling, wave mechanisms, and design considerations of a substrate integrated waveguide," IEEE
Trans.Microw, Theory and Teach, vol. 54, no. 6, June 2005.
[5] Wan Jiang, Kama Huang, and Changjun Lin,"Ka-Band Dual Frequency Single-Slot Antenna Based on Substrate Integrated
Waveguide", IEEE Antenna and Wireless Propagation Letters, vol. 17, No. 2, February 2018..
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Paper Type | : | Research Paper |
Title | : | Audio Watermarking Of Images Using LSB Technique |
Country | : | India |
Authors | : | S.Anitha1, Dr.C.Jeyalakshmi |
Abstract: In audio watermarking algorithm image is embedded into an audio signal. In this paper we propose
least significant bit based audio watermarking method which can embed two images into an audio signal
without compromising the robustness against common attacks. First we have to separate the LSB and MSB bits, then the image should be read as binary and finally embed the image binary into the audio signal in place of LSB. Compared with the existing audio watermarking methods, the proposed one is especially robust against noise addition. It is experimentally proved by adding noise to the input audio signal. Moreover the new audio watermarking method is computationally efficient..
Keywords- Audio watermarking, Least Significant Bit, Most Significant B it, Embedding, Extraction
[1]. Moustafa M.Kurdi, Imad A.Elzein and Akram M.Zeki "Least Significant Bit (LSB) and Random Right Circular Shift (RRCF) in
Digital Watermarking", IEEE transaction 2016.
[2]. Sarawut Kaengin, Surapan Airphaiboon and Somsanouk pathoumvanh "New technique for embedding watermark image into an
audio signal", IEEE 2009.
[3]. Rajni Goyal and Naresh Kumar "LSB based digital watermarking technique", international journal of application or innovation in
engineering and management, vol 3, issue 9, September 2014.
[4]. Santhoshi Bhatt, Arghya Ray, Avishake Ghosh and Ananya Ray, " Image Steganography and Visible Watermarking Using LSB
Extraction Technique", IEEE sponsored 9th International Conference on Intelligent Systems and Control,2015.
[5]. Yong Xiang, Iynkaran Natgunanathan, Yue Rong and Song Guo, "Spread Spectrum Based High Embedding Capacity
Watermarking Method for Audio Signals", IEEE transaction august 31,2015
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Paper Type | : | Research Paper |
Title | : | Bio Signal (EEG) Using Empirical Wavelet Transform In Time Frequency Analysis |
Country | : | India |
Authors | : | D.Christy Rubella || M.karthick |
Abstract: Time-frequency analysis is used to reveal the valuable information hidden in the EEG data. The high resolution of the time-frequency representation is the one of the important thing to depict geological structures. In this project, we propose a EEG time-frequency analysis approach using the newly developed empirical wavelet transform (EWT). It is the first time that EWT is used for analysing multichannel EEG data for the purpose of ECG exploration. EWT is similar to the empirical mode decomposition; it is a thoroughly adaptive signal-analysis approach, which purely contains consolidated mathematical background. . EWT first estimates the frequency components presented in the EEG signal, then computes the boundaries, and extracts oscillatory components based on the boundaries computed. The real EEG datas are synthetic, 2-D, and 3-D.Which helps to demonstrate the effectiveness of the EEG time-frequency analysis approach. Results show that the EWT can provide a much higher resolution than..
Keywords – Continuous wavelet transform (CWT), empirical wavelet transform (EWT), instantaneous frequency, sparse representation, time–frequency analysis.
[1]. J. B. Allen, "Short term spectral analysis, synthetic and modification by discrete Fourier transform," IEEE Trans. Acoust. Speech
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Paper Type | : | Research Paper |
Title | : | An Array Antenna Design for Cognitive Science Application That Tune At 2.45ghz With Better Gain And Directivity |
Country | : | India |
Authors | : | Pavithraasree Kirubakaran || Dr.M.Shanmuga Priya |
Abstract: This paper refers to a detailed analysis of the design and implementation of a 4x1 microstrip patch
antenna array of given specifications using HFSS software and a dielectric material FR4 with dielectric
substrate permittivity of 4, height of 1.6 mm. The microstrip patch antenna array is designed for Cognitive
Science applications, at an operating frequency of 2.45 GHz with microstrip line feed. The designed antenna
had a minimum return loss of about -12dB for 1.6mm height and gain with 5dB. The achievement of
narrowband width for cognitive science application. Microstrip patch antennas has high directional pattern with increased efficiency and suppresses unwanted interference and emissions on other side. Cognitive antennas are effectively used in industrial, scientific and medical applications at 2.45GHz. This antenna has the characteristics of providing multiband applications also...
Keywords:Microstrip Antenna; Antenna Arrays; Antenna; Simulation; Microstrip Line Feed, Cognitive Science.
[1]. Priya Upadhyay, Vivek Sharma, Richa Sharma, Design of Microstrip Patch Antenna Array for WLAN Application, IJEIT, Volume
2, Issue 1, July 2012.
[2]. Tanvir Ishtaique-ul Huque, Kamal Hosain, Shihabul Islam, Al-Amin Chowdhury, Design and Performance Analysis with Optimum
Param. For X-band Apps, IJACSA, Vol. 2, No. 4, 2011.
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[4]. Naresh Kumar Poonia, Krishan Kumar Sherdia, Microstrip Antenna Array for WiMAX & WLAN Applications, IJARCCE, Vol. 2,
Issue 9, September 2013.
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Paper Type | : | Research Paper |
Title | : | Design and Implementation of 8421 Code to Unit Distance Code Using Reversible Logic Gates |
Country | : | India |
Authors | : | P.Praveena || S.Sathiya |
Abstract: In recent technologies reversible logic is implemented in varies application fields. Programmable Logic Device (PLD) is a flexible architecture used for implementing digital circuits. For military applications code converters are mainly used to maintain high secrecy of data. In proposed work, the design of code converters are implemented in Programmable Logic Array (PLA) and Programmable Array Logic (PAL) techniques by using Fredkin and Feynman gate. By implementing this reversible gate quantum cost, garbage output, area, power, delay can be minimized. The code converters are designed and simulated using Xilinx software and implemented on FPGA SPARTAN 3..
[1] Gopi Chand Naguboina, K.Anusudha "Design and Implementation of Programmable Read Only Memory using Reversible Decoder
on FPGA" 4th International Conference on Signal Processing, Communications and Networking (ICSCN -2017), March 16 – 18,
2017.
[2] lunchao Wang, Ken Choi "A Carry Look-ahead Adder Designed by Reversible Logic" ISOCC2014 978-1-4799-5127-
7/$31.00@2014IEEE/.
[3] Santosh Kumar, Gurdeep Singh, Angela Amphawan"Reversible Ripple Carry Adder Using the Electro-Optic Effect of Lithiumniobate
Based Mach-Zehnder Interferometer"WRAP2015 1570212845.
[4] H.P.Shukla, A.G.Rao, Pallavi Mall "Design of Low Power Comparator Circuit Based on Reversible Logic Technology" ICETACS
2013.
[5] Ankur Sarker, Avishek Bose, Shalini Gupta "Design of a Compact Fault Tolerant Adder/Subtractor Circuits Using Parity
Preserving Reversible Gates" 2014 17th International Conference on Computer and Information Technology (ICCIT).
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Paper Type | : | Research Paper |
Title | : | Design and Implementation of Low Power and High Speed Shift Register Using Fin FET |
Country | : | India |
Authors | : | R.Gurumurugan || V.Senthamizh Selvan || S.Viswaganth |
Abstract: The electrostatic benefit of using a silicon-on-insulator wafer substrate versus a bulk-silicon wafer substrate with optimized supersteep retrograde doping for a low-power 7-/8-nm.SOI FinFET technology is projected to provide only slight improvement in performance and minimum cell operating voltage as compared with SSR FinFET technology. In this work we are applying valuable power gating schemes to FinFET based shift register to enhance its performance by reducing the leakage current in standby mode. This provides the motivation to explore the design of low leakage FinFET based Shift register with power reduction techniques..
Keywords - SOI FinFET, Low Power, D Flip-Flop, SVL Techniques, Types of Shift Register.
[1]. [1] S. Natarajanet al., "A 14nm logic technology featuring 2nd-generation FinFET, air-gapped interconnects, self-aligned double
patterning and a 0.0588 μm2 SRAM cell size," in Proc. IEEE Int. Electron DevicesMeeting, Dec. 2014, pp. 3 7.
[2]. [2] M. Yabuuchiet al., "16 nm FinFET high-k/Metal-gate 256-kbit 6T SRAM macros with wordline overdriven assist," in Proc.
IEEE Int.Electron Devices Meeting, Dec. 2014, pp. 3.3.1–3.3.3.
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channel dopant number in MOSFET's," IEEE Trans. Electron Devices, vol. 41, no. 11, pp. 2216–2221, Nov. 1994.
[4]. [4]CH. Ashok Babu, J.V.R. Ravindra and K. Lal Kishore "Novel Circuit Level Leakage Power Reduction Technique for Ultra Low
Power and high speed VLSI circuits," International Journal of Communication Engineering Applications, vol. 3, Aug-Dec 2012, pp.
508-514.
[5]. [5]D. Kumar Gautam, Dr. S.R.P. Sinha and Er. Y. Kumar Verma, "Design a Low Power Half Subtractor Using AVL Technique
Based on 65nm CMOS Technology," International Journal of Advanced Research in Computer Engineering and Technology, vol. 2,
Nov. 2013, pp. 2891-2897..
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Paper Type | : | Research Paper |
Title | : | Design of Microstrip Bandpass Filter with Dgs for Wlan Applications |
Country | : | India |
Authors | : | Prof.G.Revathi || M.Nivetha || K.Roshini || T.S.Nishanthi |
Abstract: In this paper ' A Micro strip Band Pass Filter with DGS for WLAN applications' with the frequency of 2.4GHz is designed .This filter design is obtained by using stub loaded resonators. The total area of the filter is 13*14.2mm 2 . The design shows the insertion loss as -0.1dB and return loss as -15dB for WLAN with DGS. It has the quality factor of 4 and the bandwidth is 600MHz.The filter design has been modeled, simulated using a method of moment based electromagnetic simulator IE3D and its performance has been evaluated. This structure was fabricated with FR4 substrate using PCB technology. This fabricated structure is tested with network analyzer.
Keywords:Band pass filter, mobile WLAN (Wireless local area network) , optimum distributed HPF (high pass filter), step impedance LPF (low pass filter)..
[1]. s.w.lan,min-hangweng,shoou-jinn chang,shih-kun liu ,IEEE Microwave and Wireless components letters ,Jan 2015,1531-1309
©IEEE
[2]. *Mohamed.K.Rashad, Mostafa Ashraf,**Ahmed F. Daw,Ahmed A.Ibrahim,978-1-5090-6011-5/17/$31.00 ©2017 IEEE
[3]. Arjun Kumar , M.V. Kartikeyan Engineering Science and Technology, an International Journal 20 (2017) 679–686.Published by
Elsevier Ltd.
[4]. Ala'a I. Hashash1, Mohammed H. Bataineh1,2, Imran Ahmad2, Asem Sh. Al-Zoubi1, and Fauzi Elmegri1, 978-1-5090-4815-
1/17/$31.00 ©2017 IEEE
[5]. Pragya Singha, Raghuvir Tomarb*, 2212-0173 © 2014 The Authors. Published by Elsevier Ltd..
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Paper Type | : | Research Paper |
Title | : | Implementation of Power Efficient Approximate Multiplier |
Country | : | India |
Authors | : | J.Anjana, A.Chitra || K.Shanthalakshmi |
Abstract: Low power is the most important requirement for multimedia devices including various digital signal processing algorithms. In most multimedia signal processing, the final output is disturbed by human senses, which are not accurate. This is the reason for the need to produce exactly correct outputs. Previous study in this process utilizes error reduction through voltage over scaling, utilizing algorithmic and architectural techniques. In this paper, we propose logic complexity reduction by varying partial products to improve the accuracy. We reveal this concept by proposing various type approximate half , full adder and compressor with reduced number of the transistor, and then use in the process of designing approximate multipliers. In addition to this our process usually results in significantly low power dissipation and reduced actual time. We design architectures for both compressions of video and image algorithms using the proposed approximate multipliers. This simulations results a large power savings and area savings with a very little loss in output quality of image, when it is compared to existing system.
Keywords: Approximate multiplier, partial products, Low-power
[1]. V. Gupta, D. Mohapatra, A. Raghunathan, and K. Roy, "Low-power digitalsignal processing using approximate adders," IEEE
Trans. Comput.- Aided Design Integr. Circuits Syst., vol. 32, no. 1, pp. 124–137,Jan. 2013.
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Paper Type | : | Research Paper |
Title | : | Design of Wilkinson Power Divider for Mobile and WLAN Applications |
Country | : | India |
Authors | : | Prof.G.Kalpanadevi || S.J.Keerthanaa |
Abstract: Power dividers are commonly used in microwave systems. One most popular configuration is Wilkinson power divider, due to its simplicity, good match at the input and output ports. However, it operates at single frequency but of large size especially at lower frequency band and there is presence of spurious harmonic. As the frequency increases, wavelength decreases. Conventional power divider operates at a fundamental frequency and odd harmonics. The component values were initially computed. Investigations on the configurations were performed using advanced design system software. It can be concluded that the modified power divider has been successfully designed to operate in 915 MHz and 2.4 GHz with equal power division of - 3 dB at each output port for their respective applications.
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[2]. J Yang C Gu and W Wu "Design of Novel Compact Coupled Microstrip Power Divider with Harmonic Suppression " IEE
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Paper Type | : | Research Paper |
Title | : | Face Anti-Spoofing using Robust Features and Fisher Vector Encoding based Innovative Real Time security system for Automobile Applications |
Country | : | India |
Authors | : | R.Jayashalini || Ms.S.Priyadharshini |
Abstract: The vulnerabilities of face biometric authentication systems to spoofing attacks have received a significant attention during the recent years. Some of the proposed countermeasures have achieved impressive results when evaluated on intra-tests i.e. the system is trained and tested on the same database. Unfortunately, most of these techniques fail to generalize well to unseen attacks e.g. when the system is trained on one database and then evaluated on another database. This is a major concern in biometric anti-spoofing research which is mostly overlooked. In this paper, we propose a novel solution based on describing the facial appearance by applying Fisher Vector encoding on Speeded-Up Robust Features (SURF) extracted from from different color spaces. The evaluation of our countermeasure on three challenging benchmark face spoofing databases, namely the CASIA Face Anti-Spoofing Database, the.........
[1]. Y. Li, K. Xu, Q. Yan, Y. Li, and R. H. Deng, "Understanding OSN-based facial disclosure against face authentication systems," in
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Paper Type | : | Research Paper |
Title | : | Miniature Implantable Antenna for MICS Band |
Country | : | India |
Authors | : | S. Reena || M. Swathi || R. Sandhiya || M. Sakthi sreedevi || R. Kayalvizhi |
Abstract: A Microstrip line-fed planar antenna with triple notched band is designed for Ultra Wide band application (UWB) communication applications. The triple band-pass characteristic is achieved by etching a single tri-arm resonator below the batch. The proposed antenna uses only one simple filter element to create and control triple pass bands, which give it advantages over the recently proposed band –notch antennas. In addition, the designed antenna achieved a good gain and exhibits Omni directional radiation pattern except at notched bands, which make it a suitable candidate for UWB application. The simulated and experimental results show that the designed antenna has achieved a wide bandwidth ranging from 2.98 to 10.76 GHz with three pass bands operating at 3.6GHz for Wi-MAX, 5.2GHz for WLAN and 7.5GHz for Satellite communication services. It also achieves the return loss of <=-10 dB..........
Keywords: Ultra Wide band (UWB), HFSS, VSWR, Planar antenna.
[1]. Ahmed ToahaMobashsher, Mohammad Tariqul Islam and Rezaul Azim, (2013), 'Design of a Dual Band-Notch UWB Slot Antenna
by Means of Simple Parasitic Slits', IEEE Antennas and Wireless Propagation Letters, Vol. 12, No.2, pp.1412-1415.
[2]. Amin Araghi and Vorya Waladi. (2013), 'Very Compact UWB Printed Monopole Antenna with Dual Band Notched
Characteristics', International Journal of Natural and Engineering Sciences, Vol. 7, No.3, pp.82-86.
[3]. Bin Xu, et.al., (2013), 'A CPW-fed dual band-notched UWB antenna with a pair of bended dual-L-shapeparasitic branches',
Progress in Electromagnetics Research, Vol. 136, No.8, pp.623-634.
[4]. Bo Li, et.al., (2012), 'A dual band-notched UWB printed antenna with C-shaped and a U-shaped slot', Microwave and Optical
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& Propagation Conference, Vol. 8, No. 22, pp.341-344...