iosr-JECE   Volume-10 ~ Issue-1 ~ Jan-Feb 2015

Abstract: We propose a algorithm for rigorously comparing the different types of edge detection techniques. The computed results and detailed comparison is analytically calculated. The results are verified by simulation. The algorithm is used to evaluate four edge detection techniques. Simulated results of two-dimensional image give the idea about perfect edge technique for reorganization of noisy image. The experiment with several methods shows the ability to detect weak edges.

Keywords: Canny, Sobel, Roberts, Prewitt etc.

[1]. Umbaugh, Scott E (2010). Digital image processing and analysis : human and computer vision with CVIP tools (2nd ed. ed.). Boca
Raton, FL: CRC Press. ISBN 9-7814-3980-2.
[2]. Mamta Juneja , Parvinder Singh Sandhu. "Performance Evaluation of Edge Detection Techniques for Images in Spatial Domain".
International Journal of Computer Theory and Engineering, Vol. 1, No. 5, December, 2009.
[3]. Seif, A.,et.al. ;"A hardware architecture of Prewitt edge detection", Sustainable Utilization and Development in Engineering and
Technology (STUDENT), 2010 IEEE Conference, Malaysia, pp. 99 – 101, 20-21 Nov.2010.
[4]. Canny, J., "A Computational Approach to Edge Detection", IEEE Trans. Pattern Analysis and Machine Intelligence, vol. 8:679-
714, November 1986.

Abstract: Inside a network environment, packets is the most important in carrying data to perform communication. Such a circumstance is easy to be attacked by an intruder and perform eavesdropping which leads to data loss/duplication/redundancy. Comprehend speaking, packet dropping and modification are the two common attacks that can be easily launched by an adversary to disrupt communication in multi hop networks, specifically mobile ad hoc networks. Hence a remedial approach is proposed to compensate such attacks. A tree based approach is designed to designate the attack in order to identify packet droppers and modifiers. In this direction, it has been assumed that the mobile nodes continuously monitor the behaviors of the forwarding mobile nodes which may be neighbors to determine if their neighbors are misbehaving. To address this problem, a hierarchical method is proposed and detects malicious mobile nodes that drop or modify packets. Extensive analysis and simulations have been conducted to study the performance of attacks with respect to efficiency of the scheme.

Keywords: attack, intruder, behavior, packet dropping, modification

[1]. H. Chan and A. Perrig, ―Security and Privacy in SensorNetworks,‖ Computer, vol.36, no. 10, Oct. 2003.
[2]. C. Karlof and D. Wagner, ―Secure Routing in Wireless SensorNetworks: Attacks andcountermeasures,‖ Proc. IEEE First Int'lWorkshop Sensor Network Protocolsapplications03Applications, 2003.
[3]. V. Bhuse, A. Gupta, and L. Lilien, ―DPDSN: Detection of Packet-Dropping Attacksforwireless Sensor Networks,‖ Proc. FourthTrusted Internet Workshop, 2005.
[4]. M. Kefayati, H.R. Rabiee, S.G. Miremadi, and A. Khonsari, ―Misbehavior Resilient Multi Path Data Transmission in MobileAd-Hoc Networks,‖ Proc. Fourth ACM Workshop sec urity of Ad Hoc and Sensor Networks 2006.
[5]. R. Mavropodi, P. Kotzanikolaou, and C. Douligeris, ―Secmr—ASecure MultipathRouting Protocol for Ad Hoc Networks,‖ Ad HocNetworks, vol. 5, no. 1, pp. 87-99,2007.
[6]. F. Ye, H. Luo, S. Lu, and L. Zhang, ―Statistical En-Route Filteringof Injected FalseData inSensor Networks,‖ Proc. IEEE INFOCOM,2004. November 1986.

Abstract: Edge detection is one of the most commonly used operations in image analysis particularly in the areas of feature extraction. Edge indicates the boundary between overlapping objects. An edge is the boundary between an object and the background, hence if the edges are identified accurately in an image all its objects can be located and basic properties such as area, perimeter and shape of an image can be measured. An edge can be defined as a set of connected pixels that forms a boundary between two disjoints regions. Edge detection is basically, a method of segmenting an image into regions of discontinuity. The data of edge detection is very large, so the achievement of high speed of image processing is a difficult task. Field Programmable Gate Array (FPGA) can overcome this difficult task and it is an effective device to realize real-time parallel processing for vast amounts of image and video data. The proposed work shows the implementation of Canny Edge detection algorithm on FPGA.

[1]. Rafael C. Gonzalez, Richard E. Woods. "Digital Image Processing", Prentice Hall, 2nd edition (January 15, 2002).
[2]. Marques, O; "Image Processing Basics", Practical Image and Video Processing Using MATLAB, 2011, pp 21-34.
[3]. Leung, C.M. ; Lu, W.S; "Detection of edges of noisy images by 1-D and 2-D linear FIR digital filters", IEEE International conference on Communications, Computers and Signal Processing, vol.1, 1993, pp. 228-231.
[4]. Alasdair Mc Andrew. "Introduction to Digital Image Processing with MATLAB"
[5]. Ehsan Nadernejad, Sara Sharifzadeh; "Edge Detection Techniques:Evaluations and Comparisons" Applied Mathematical Sciences, Vol. 2, 2008, no. 31, 1507 – 1520.
[6]. Wenhao He and Kui Yuan "An Improved Canny Edge Detector and its Realization on FPGA" IEEE Proceedings of the 7th World Congress on Intelligent Control and Automation, Chongqing, China, June 25 - 27, 2008.
[7]. Qian Xu, Chaitali Chakrabarti and Lina J. Karam "A Distributed Canny Edge Detector and Its Implementation On FPGA" School of Electrical, Computer and Energy Engineering, Arizona State University, IEEE, 2011, pp. 500-505.

Abstract: The increasing application of embedded electronic components in vehicles brings the need to use diagnostic systems for track and control of parameters. Development, industrial and after-sales are all fields thatuse diagnostic systems' help to execute their tasks.A diagnostic system must, therefore, contain a protocol for connecting the diagnostic tools that the designers, testers and repairers use for checking the ECU's diagnosis information. Each protocol might be suitable for only one diagnostic system and vehicle components and systems need a great amount of effort to implement protocol for one particular diagnostic system. However, there are many types of diagnostic systems defined by ISO and SAE depending on the type of systems and specific diagnostics from the vehicle manufacturers. Moreover, under some conditions, the development time may more than double. Applying communication protocols such as KWP2000, CAN and UDS makes diagnostic device of vehicle network communicate to each other according tostandards.This Paper aims to present an overview about a fewcommunication protocols for diagnostic and services, byshowing their specific tools and applications.

Index terms: Controller Area Network, International Standard Organization, Society of Automotive Engineers, OSI Layers, Keyword Protocol, Unified Diagnostics

[1]. Bosch. "CAN Specification", Version 2.0, Robert Bosch GmbH, 1991.
[2]. ISO 15765-3 - Road vehicles – Diagnostics on CAN – Part 3: Implementation of diagnostic services.
[3]. ISO 15765-2 - Road vehicles – Diagnostics on CAN – Part 2: Network layer services.
[4]. ISO 14230-1- Road vehicle – Diagnostics Systems – Keyword Protocol 2000Part 1: Physical layer, 1999
[5]. ISO 14230-2 - Road vehicles – Diagnostics Systems - Keyword Protocol 2000 Part 2: Data link layer, 1999
[6]. ISO 14230-3- Road vehicles – Diagnostics Systems - Keyword Protocol 2000Part 3: Application layer, 1999
[7]. ISO 11898-1-Road vehicles – Controller Area Network (CAN) – Part 1: Data link layer and physical signalling, 2003.

Abstract: Short distance data collection processes have problems. These can be termed as the repetition of work at many steps, complexity involved in cable connections; the need of real time data processing and the electromagnetic interference etc.We are proposing design of the system of data acquisition using LPC1768 and virtual instrument. The system leverage Cortex-M3 core ARM processor for performing the data acquisition of the closed environment, use the Bluetooth serial port module to implement the wireless data transmission, and use the virtual instrument to handle the received data in the host machine. The system is recommended for wireless data collection, the wireless hand-held meter reading and the industrial real time information collection.

Keywords: Wireless communication; Bluetooth serial port; Virtual instrument

[1]. Z. Jia, L. Meng, and S. Gao, "Based on STM32 wireless sensor network localization node design and implementation," Sensor and microsystems, vol 29 ( 11) , pp. 107-109, 2010
[2]. J. Li, "Based on Bluetooth technology, wireless data acquisition system design," Micro computer information, vol 24 ( 2) , pp. 195-196, 2008
[3]. L. Jie, J. Zhou, and P. Fan, "Based on virtual instrument and Bluetooth technology wireless test system," Electronic measurement technology,vol 33 ( 6) , pp. 85-87, 2010
[4]. L. Li, "A Bluetooth wireless sensor network," Micro computer information, vol 7, pp. 7246 – 248, 2006
[5]. Q. Zheng, and Y. She, "The Bluetooth technology in the measurementand control system and their application in the frequency hoppingtechnology research," Micro computer information, vol 11, pp. 122-124,2004
[6]. Z. Xing, J. Li, and H. Liang, "Based on ARM+FPGA GPS receiverdesign," Sensor with micro systems, vol 30 ( 7), pp. 108-110, 2011

Abstract: With the recent rapid advances in multimedia and communication systems, real-time signal processing like audio signal processing, video/image processing, or large-capacity data processing are increasingly being demanded. The multiplier and multiplier-and-accumulator (MAC) are the essential elements of the digital signal processing such as filtering, convolution, and Inner products.
Index Terms: Booth multiplier, carry save adder,Booth multiplier,Digital signal processing(DSP), multiplier and-accumulator(MAC).

[1]. Fayez Elguibaly, " A fast parallel multiplier –accumulator using the modified booth algorithm," IEEE Trans on Circuits and
systems,vol.47,September 2000
[2]. Young-Ho Seo,Dong –Wook Kim," A New VLSI Architecture of Parallel Multiplier and Accumulator Based on Radix-2 Modified
Booth Algorithm,"IEEE Trans.on VLSI,vol.18,February 2012
[3]. B Rajani kumari,K.V Ramana Rao,"Dynamic Power Suppression Technique in Booth Multipliers",IJITEE 2278-3075, Volume-1,
Issue-4, September 2012
[4]. G.Sasi,"Design of Low Power /High Speed Multiplier Using Spurious Power Suppression Technique" IJCSMC, Vol. 3, Issue. 1,
January 2014, pg.37 – 41
[5]. R.Sheshadri M.E," Spurious Power Suppression Technique for VLSI Architecure",IJCSE Vol. 3 No.6 Dec 2012-Jan 2013

Abstract: Fingerprint identification is one of the most popular and reliable personal biometric identification methods. By using this biometric authentication, we can prevent non-licensees from driving and therefore causing accidents. The proposed system consists of a smart card capable of storing the fingerprint of particular person. While issuing the license, the specific person's fingerprint is to be stored in the card. Vehicles such as cars should have a card reader capable of reading the particular license. The same automobile should have the facility of fingerprint reader device .A person, who wishes to drive the vehicle, should insert the smartcard in the vehicle and then swipe his/her finger. If the fingerprint matches with the fingerprint stored in the smart card then it goes for alcohol detection and seatbelt checking. After passing all authentications, the vehicle will be ignited. The vehicle will not be ignited, if any one of the authentications fails and will not proceed the next step. This increases the security of vehicles and also ensures safe driving by preventing accidents. The prototype of the ignition system is used by the Master controller

[1]. "Road accidents in India", http://www.slideshare.net/gavitankush/semiroad-accidents-in-india-nar
[2]. David Silcock, Anna Sunter & Chris van Lottum, Ross Silcock Limited, Kris Beuret, Social Research Associates, "Unlicenced Driving: A Scoping Study to Identify Potential Areas for Further Research" Foundation for Road Safety Research.
[3]. Omidiora E. O., Fakolujo O. A., Arulogun O. T., Aborisade D. O., (2011), A Prototype of a Fingerprint Based Ignition Systems in Vehicles, European Journal of Scientific Research, ISSN 1450-216X Vol.62 No.2 (2011), pp. 164-171. [4]. "Cortex-M3LPC1768", www.nxp.com/documents/data_sheet/LPC1768_66_65_64.pdf
[5]. "Smartcard reader , http://en.wikipedia.org/wiki/Card_reader.
[6]. "KY-M6Fingerprintmodule", http://www.aliexpress.com/item/Fingerprint-Sensor-Scanner-KY-M6/331504431.html
[7]. http://www.pololu.com/file/0J310/MQ3.pdf

Abstract: A floating-point arithmetic unit designed to carry out operations on floating point numbers. Floating point numbers can support a much wider range of values than fixed point representation. Floating Point units are mainly used in high speed objects recognition system, high performance computer systems, embedded systems, mobile applications. Latch based design is implemented in the proposed work so the longer combinational paths can be compensated by shorter path delays in the subsequent logic gates. That is why the performance has increased in the design. All four individual units addition, subtraction, multiplication and division are designed using Verilog verified by using Questa Sim and implemented on vertex-5 FPGA

Keywords: Floating Point, IEEE, FPGA, Vertex-5, Double Precision, Verilog, Arithmetic Unit

[1]. Chaitanya a. Kshirsagar, P.M. Palsodkar "An FPGA implementation of IEEE - 754 double precision floating point unit using verilog" international journal of electrical, electronics and data communication, ISSN: 2320-2084 , volume-2, issue-6, june-2014
[2]. Paschalakis, S., Lee, P., "Double Precision Floating-Point Arithmetic on FPGAs", In Proc. 2003 2nd IEEE International Conference on Field Programmable Technology (FPT ‟03), Tokyo, Japan, pp. 352-358, 2003
[3]. Addanki Puma Ramesh, A. V. N. Tilak, A.M.Prasad "An FPGA Based High Speed IEEE-754 Double Precision Floating Point Multiplier Using Verilog" 2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT), pp. 1-5, 7-9 Jan. 2013
[4]. Ushasree G, R Dhanabal, Sarat Kumar Sahoo "Implementation of a High Speed Single Precision Floating Point Unit using Verilog" International Journal of Computer Applications National conference on VSLI and Embedded systems, pp.32-36, 2013

Abstract: In this paper a new technique to widen bandwidth of a microstrip patch antenna is proposed. For the proposed antenna, shape and dimensions are chosen for obtaining wide bandwidth and small size. First a simple patch antenna is designed for the test, and then a microstrip patch antenna employing EBG structures with partial ground is demonstrated. This proposed design exhibits wide band behavior of resonant frequencies 2.5 GHz, 7.2 GHz, 10.6 GHz and 12.9 GHz frequencies with good return loss values -13.96 dB,-12.08 dB, -13.8 dB and -19.0 dB respectively. The design is analyzed with Ansoft HFSS 13.0 electromagnetic field solver.

Keywords: EBG (Electromagnetic Band Gap), Microstrip Patch Antenna (MPA),

[1]. Jiejun Zhang, Junhong Wang, Meie Chen, and Zhan Zhang "RCS Reduction of Patch Array Antenna by Electromagnetic Band-Gap Structure" IEEE Antennas and Wireless Propagation Letters, VOL. 11, 2012.
[2]. Mst. Nargis Aktar, Muhammad Shahin Uddin, "Enhanced Gain And Bandwidth Of Patch Antenna Using EBG Substrates," International Journal of Wireless & Mobile Networks (IJWMN), Vol. 3, No. 1, February 2011.
[3]. Jatinderpal Singh, Amandeep Singh and Nancy Gupta, "Design Analysis of a Hexaband Slot Loaded Microstrip Patch Antenna using ANN," International Journal of Computer Applications, vol. 101, No. 14, pp. 7-12, 2014
[4]. Jose Felipe Almeida, Carlos Leonidas da S. S. Sobrinho and Ronaldo Oliveira dos Santos,"Study of a Microstrip Antenna with PBG Considering the Substrate Thickness Variation" Depto. of Elect. and Comp. Eng., Federal University of Pará (UFPA), PO Box 8619, Zip Code: 66073-900,Belém, PA, Brazil.

Abstract: Phase array antenna radiates a signal pattern whose side lobes compared to the main lobe is higher than the acceptable value and become more pronounced when the array is steerable (scanning array). Despite efforts made by array designers to control this defect, have still not solved the problem of power losses in undesired directions and radio signal interference with other frequency signals. In this paper, a modified particle swarm optimization program has been proposed. The program finds the values of current excitation that will minimize sidelobe level and achieve a radiation pattern that matches closely with the desired pattern. The Particle Swarm Optimization program forms a part of a 24 array antenna model, and the whole idea is simulated in MATLAB environment. Results obtained are very satisfactory. When fully implemented by array designers, power losses will greatly reduce and radio link communication will greatly improve.

Keywords: Radiation, Antenna, Optimization, Swarm, Matlab

[1]. Balanis. C. A, Antenna Theory: Analysis and Design, 3rd ed., Hoboken: John Wiley, 2005, pp. 300-304.
[2]. Basker S, Alphones A, Suganthan P. N, Genetic Algorithm based design of a reconfigurable antenna array with descrete phase
shifters, Wiley Online library, 2005.
[3]. Dahab.A ,1994: A new technique for linear antenna array processing for reduced sidelobes using neural networks,
[4]. Drabowitch S, Papiernik A, Griffiths H, Encinas J, & Bradford L. Smith, Modern Antennas, Chapman & Hall, London, pp. 400-
402, 1998.
[5]. Haupt R. L, "Directional Antenna System Having Sidelobe Suppression", Us Patent 4, pp571- 594 Feb 18, 1986.
[6]. Pallavi Joshi, Optimization of linear antenna array using genetic algorithm for reduction in side lobe levels and to improve
directivity, international journal of latest trends in engineering and technology, vol 2, may 2013.

Abstract: With Radio Frequency Identification (RFID), new uses of identification and collection of data about tracking of items have been made possible; also, it is understandable that major interest is given to issues of information security and privacy. Lack of assurance regarding data security is one of the remaining obstacles for widespread usage of RFID (A. Juels and R. Pappu, 2004). RFID still can be done without security assurance if individuals do not have to worry about forsaking their privacy. Many issues related to data security and privacy within RFID systems is inherited through using already known technology and methods (Aljifri and Tyrewalla, 2004). However there are many new issues, especially regarding personal data security that need to be resolved and that is why I propose RSA algorithm to mitigate the data security challenges in RFID.

Keywords: RFID, Data security and RSA algorithm.

[1]. A.Juels and R. Pappu, (2003), "Squealing euros: Privacy protection in RFID-enabled banknotes", In proceedings of Financial Cryptography – FC'03, LNCS, volume 2742, Springer-Verlag, pages 103-121.
[2]. Tanenbaum, D. Wetherall "Computer Networks"2011.
[3]. AES page available via http://www.nist.gov/CryptoToolkit

Abstract: Gabor filter had a very vast application in the field of image processing. This proposed system is used to reduce the noise and to increase the speed of the system in betel leaves image segmentation using Verilog HDL under the cadence platform. In this proposed system the MAC was used to increase the speed. Input of the proposed system was given in the form of pixels. Then this input pixel was convoluted by the filter coefficient which was stored in the proposed system memory. The main objective of this proposed system is to improve the speed of the design and noiseless image segmentation without affecting the area.

Keywords: Gabor filter, Verilog HDL, MAC, Noiseless image segmentation

[1] Razak, A.H.A. Taharin, R.H. "Implementing Gabor Filter for Finger Print Recognition using Verilog HDL", IEEE Explorer, March
2009.
[2] M.Srinivas, M.Praveena, "Design of a Modified Gabor Filter by using Verilog HDL", IJERA, May-Jun 2012
[3] K. Ramya, K. K. Manoj, S. Mithunraj "FPGA Implementation of Gabor Filter Design for Image Processing Application", IJETAE,
Volume 4, issue 1, January 2014
[4] S.Gayathri, Dr.V.Sridhar, "Design and Simulation of Gabor Filter using Verilog HDL",IJLTET, March 2013 .
[5] Vijayakumar, J. and Dr.S. Arumugam, 2012. Study of Betelvine Plants Diseases and Methods of Disease Identification using
Digital Image Processing, European Journal of Scientific Research, 70(2): 240-244.
[6] Vijayakumar, J. and Dr.S. Arumugam, 2012. Foot Rot Disease Identification for the Betelvine Plants using Digital Image
Processing, Journal of Computing, 3(2): 180-183.
[7] Vijayakumar, J. and Dr.S. Arumugam, 2012. Recognition of Powdery Mildew Disease for Betelvine Plants using Digital Image
Processing", International Journal of Distributed and Parallel systems (IJDPS), 3(2): 180 -183.