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ABSTRACT: Approximate multiplication can reduce logic and switching activity in error-tolerant signal-processing and machine-learning hardware. This work presents a FPGA comparison of an 8-bit unsigned exact multiplier and an ordinary column-truncated multiplier in which partial products with i+j<CUT are omitted, with CUT=6. Both architectures are evaluated on an Avnet ZedBoard (XC7Z020-CLG484-1) using Xilinx Vivado 2019.2 with common timing constraints, and synthesis with DSP inference disabled. Post-route measurements are reported over target clock frequencies from 100 to 190 MHz for both architectures, with an additional 200-MHz point for the truncated......
Keywords - approximate computing, FPGA, truncated multiplier, partial-product truncation, dynamic power, power-delay product, area-delay product.
[1] H. Jiang, F. J. H. Santiago, H. Mo, L. Liu, and J. Han, “Approximate arithmetic circuits: A survey, characterization, and recent applications,” Proc. IEEE, vol. 108, no. 12, pp. 2108–2135, Dec. 2020, doi: 10.1109/JPROC.2020.3006451.
[2] A. Momeni, J. Han, P. Montuschi, and F. Lombardi, “Design and analysis of approximate compressors for multiplication,” IEEE Trans. Comput., vol. 64, no. 4, pp. 984–994, Apr. 2015, doi: 10.1109/TC.2014.2308214.
[3] N. Petra, D. De Caro, V. Garofalo, E. Napoli, and A. G. M. Strollo, “Truncated binary multipliers with variable correction and minimum mean square error,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 6, pp. 1312–1325, Jun. 2010, doi: 10.1109/TCSI.2009.2033536.
[4] V. Garofalo, N. Petra, and E. Napoli, “Analytical calculation of the maximum error for a family of truncated multipliers providing minimum mean square error,” IEEE Trans. Comput., vol. 60, no. 9, pp. 1366–1371, Sep. 2011, doi: 10.1109/TC.2010.236.
[5] S. Hashemi, R. I. Bahar, and S. Reda, “DRUM: A dynamic range unbiased multiplier for approximate applications,” in Proc. IEEE/ACM ICCAD, Austin, TX, USA, 2015, pp. 418–425, doi: 10.1109/ICCAD.2015.7372600
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ABSTRACT: This study presents a low-cost experimental procedure for characterizing the transient cooling behavior of three 10 Ω, 5 W power-resistor technologies: wirewound ceramic, cement, and aluminum-housed resistors. Each specimen was heated from a regulated 5V DC source until its surface temperature reached 80 °C. The supply was then disconnected and temperature was measured with an LM35 sensor interfaced to an Arduino Uno at 5 min intervals....
Keywords - modelling of dynamic systems, educational technology, thermal transient, power resistor, Newton’s Cooling Law, teaching methodology
[1] Posobkiewicz, K., & Gorecki, K. (2021). Influence of selected factors on thermal parameters of the components of forced cooling systems of electronic devices. Electronics, 10(3), 340.
[2] Liang, D., Zhu, Z. Q., Nilifard, R., Azar, Z., Madani, N., & Christensen, J. B. (2024). Novel lumped-parameter thermal modeling—Part I: Thermal models for cuboidal components. IEEE Transactions on Transportation Electrification, 11(1), 3942-3955.
[3] Baumann, M. S., Steinboeck, A., Kemmetmüller, W., & Kugi, A. (2024). Real-time capable thermal model of an automotive permanent magnet synchronous machine. IEEE Open Journal of the Industrial Electronics Society, 5, 501-516.
