iosr-JECE   Volume-12 ~ Issue-2 ~ March-April 2017

Abstract: This work investigated the optimum location of Erbium Doped Fiber Amplifier (EDFA) in an optical system based on analysis of BER analyzer metrics by simulation approach using Optisystem software. The simulation model will be studied based on many parameters as input power (dBm), gain of Amplifier (dBm), fiber cable length (km) and attenuation coefficient (dB/km), there are two different parameters will be analyzed at five different locations of EDFA which are Q-Factor and Bit Error Rate (BER) and also Eye Diagram, which Q-factor and BER are measurement parameters used to measure the quality of received signal at receiver.

Keywords: EDFA, Bit Error Rate, Optical Amplifier, Optisystem simulator, Optical System, Q-factor

[1] Fiber-Optics.info, Optical Amplifiers, http://www.fiber-optics.info/articles/optical_amplifiers.
[2] Warsha Balani and Manish Saxena, EDFA Gain Performance analysis at 2Gbits/sec in Optical Transmission System, International Journal of Multidisciplinary and Current Research, August 2013, ISSN: 2321-3124.
[3] Giridhar Kumar R, Iman Sadhu and Sangeetha N, Gain and Noise Figure Analysis of Erbium Doped Fiber Amplifier by Four Stage Enhancement and Analysis, International Journal of Scientific and Research Publications, Volume 4, April 2014, ISSN 2250-3153.

Abstract: In the optical transmission systems attenuation causes signal power to drop through an optical fiber link, so need to use amplifiers to increase signal power with low noise. Semiconductor Optical Amplifier (SOA) and Erbium-Doped Fiber Amplifier (EDFA) are two of the main types of optical amplifiers, and they were used in this simulation model to analyze their performance, with a data rate of 622 Mb/s (STM-4 level) and 170 km optical fiber length for each simulation model. This was simulated by using OptiSystem simulator, including the main parameters of the optical transmission system as input power (dBm), optical fiber cable length (km) and attenuation per length of optical fiber cable (dB/km), also there are three parameters will be considered which they are output power (dBm), Q-Factor and Bit Error Rate (BER) at receiver, and also Eye Diagram.

Keywords: EDFA, Optical Amplifier, Optisystem simulator, Optical Transmission System, SOA

[1] Aashima Bhardwaj and Gaurav Soni, Performance Analysis of 20Gbps Optical Transmission System Using Fiber Bragg Grating, International Journal of Scientific and Research Publications, Volume 5, Issue 1, January 2015, ISSN 2250-3153.
[2] Home Birla Institute of Technology and Science, C10 Optical Amplifiers - Optical Amplifiers Chapter 10, https://www.coursehero.com/file/12879505/C10-Optical-Amplifiers/.
[3] Audra Bond, Chapter 6 Optical Amplifiers, http://slideplayer.com/slide/7680367/.
[4] School of Electronic and Communications Engineering, Unit 1.5 Optical Amplifiers, http://www.electronics.dit.ie/staff/tfreir/optical_2/Unit_5.ppt.
[5] Sham Arsenal, Optical Amplifiers -The need, Types, Working Principle and Comparison, http://www.slideshare.net

Abstract: The dielectric-metal-dielectric plasmonic waveguide structures find applications in integrated optics and fiber polarizers and sensors. Surface plasmon waves guided by thin metal film have been intensively studied over the last two decades. However, most studies have been confined to relatively low index dielectrics. With growing interest in silicon photonics and other semiconductors dielectric of relatively higher dielectric constant we carried out a detailed study of the modes supported by a metal filmbetween dielectrics of relatively higher dielectric constant. The study clearly shows that both modes.............

Keywords: Surface plasmon modes, dielectric-metal-dielectric waveguide, bound modes, leaky modes, sensors

[1] J. M. Pitarke, V. M. Silkin, E. V. Chulkov, and P. M. Echenique, Theory of surface and surface-plasmon polaritrons, Rep. Prog. Phys. 70, 2007, 1-87
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Abstract: In this paper, the performance of various windowfunctions for Fiber Bragg Grating Sensor (FBGS)is investigated and evaluated in order to get optimized reflection spectrum with high reflectivity and an efficient side lobe suppression for efficient sensing measurement applications.For this purpose, a wide range of design parameters which include grating length and refractive index modulation amplitudehas been chosen to evaluate the sensor design. The performances of the different windowfunctions have been then compared in terms of reflectivity, full width half maximum bandwidth (FWHM), and sidelobe level(SLL) so as to get the most suitable design parametersto be used for sensing measurement.The simulation results presented in this paper show the effectiveness of the optimizedFBG sensor, which can be further implemented for high performance sensing applications.

Keywords: Fiber Bragg Grating Sensor (FBGS), Full Width at Half Maximum (FWHM), Side Lobe Level (SLL)

[1]. Frantisek Urban, Jaroslav Kadlec and Radek Vlach, "Design of a Pressure Sensor Based on Optical Fiber Bragg Grating Lateral Deformation," sensors, pp. 11212-11225, 2010.
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[5]. M. J. Moghimi, H. Ghafoori-Fard, and A. Rostami, "Analysis and design of all-optical switching in apodized and chirped Bragg gratings," Progress In Electromagnetics Research B,, vol. 8, pp. 87-102, 2008.

Abstract: Vehicular ad -hoc network (VANET) has a problem called high mobility and uneven distribution of vehicles which affect the performance of routing. The high mobility may changes arrangements of a network, and the uneven distribution of vehicles leads to node failures due to network partition; In an urban environment the high density of vehicle cause drastic wireless contentions. In this paper, we use the Even Data Distribution (EDD) protocol to make uneven distribution of data transmission in the vehicular ad-hoc network to even distribution. In which the high mobility of vehicles in urban areas causes loss of data due to uneven distribution in order to reduce the impact of uneven distribution we transform it into even distribution using EDD protocol.

Keywords: EDD, Uneven distribution, Vehicular ad-hoc network, Even distribution.

[1]. O. Andrisano, R. Verdone, and M. Nakagawa, "Intelligent transportation systems: The role of third generation mobile radio networks," IEEE Commun. Mag., vol. 38, no. 9, pp. 144–151, Sep. 2000.
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[3]. V. Kumar, S. Mishra, and N. Chand, "Applications of VANETs: Present & future," Commun. Netw., vol. 5, no. 1B, pp. 12–15, 2013.
[4]. J. Nzouonta, N. Rajgure, G. Wang, and C. Borcea, "VANET routing on city roads using real-time vehicular traffic information," IEEETrans. Veh. Technol., vol. 58, no. 7, pp. 3609–3626, Sep. 2009.
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Abstract: VANET (Vehicular Ad-hoc Network) is a wireless network in vehicle for Intelligent Transportation System (ITS). In this paper, we propose a mechanism to prevent accidents due to sleepiness and alcohol consumption of the driver. Vehicle to Vehicle (V2V) communication is the most effective solution we have used in order to prevent accidents using the Li-Fi technology.

Keywords: VANET, V2V, ITS, Li-Fi.

[1]. O. Andrisano, R. Verdone, and M. Nakagawa, "Intelligent transportation systems: The role of third generation mobile radio networks," IEEE Commun. Mag., vol. 38, no. 9, pp. 144–151, Sep. 2000.
[2]. V. Kumar, S. Mishra, and N. Chand, "Applications of VANETs: Present &future," Commun. Netw., vol. 5, no. 1B, pp. 12–15, 2013.
[3]. Alin-M. Cailean, Barthélemy Cagneau, Luc Chassagne, Suat Topsu, "Design and implementation of a visible light communications system for vehicle applications", November 2013.
[4]. Shubham Chatterjee, Shalabh Agarwal, "Scope and Challenges in Light Fidelity(LiFi) Technology in Wireless Data Communication", June 2015.
[5]. Mehboob raza haider, manoj mdongre, "Vehicle to vehicle communication using visible light communication technology".

Abstract: With the continuously increasing demand for low power & high speed VLSI circuits the brain storming among the scientists, inventors & researchers to find the techniques required to design such high performance circuits is also increasing day by day. In the answer to this search several design techniques have been found. Output prediction logic-OPL technique is one of such newly introduced techniques. OPL is a technique that can be applied to conventional CMOS logic families in order to obtain considerable speedups. Speedups of two to three times over static CMOS logic are demonstrated for a variety of combinational circuits..........

Keywords: Output prediction logic-OPL technique, high speed & low power VLSI circuits, CMOS logic families.

[1] G. Divya, B. Subbarami Reddy, P. Bhagyalakshmi, "Performance evaluation of the CMOS full adders in TDK 90 nm technology", International Journal of Scientific and Research Publications, ISSN 2250-3153 , Volume 4, Issue 1, pp. 1-4, January 2014.
[2] Sentamilselvi M, Mahendran P, "High performance adder circuit in VLSI system", International journal of technology enhancements and emerging engineering research, ISSN 2347-4289, Vol. 2, Issue 3, pp. 80-83, 2014.
[3] N. Srinivasa Gupta, M. Satyanarayana, "A novel domino logic for arithmetic circuits", International journal of innovative technology and exploring engineering (IJITEE) ISSN: 2278-3075, Volume-3, Issue-3, pp. 34-37, August 2013.
[4] Pierce Chuang, David Li, Manoj Sachdev, "Constant delay logic style" IEEE transactions on very large scale integration (VLSI) systems, vol.21, no.3, pp. 554-565, March 2013.
[5] Chiranjeevi Pandamaneni, Mr.Syed Inthiyaz, Aditya.K, B.V.Aravind, "Implementation of low power high performance combinational circuits using output prediction logic" International Journal of Engineering Research and Applications (IJERA), ISSN: 2248-9622 Vol. 2, Issue 2, pp.1316-1321, Mar-Apr 2012

Abstract: The primary goal of this work is to introduce temporal artifact detection strategy to detect non responsive channels and trials in evoked potentials by tracing out the signals with very low energy and to remove artifacts in multichannel evoked potentials. The non responsive channels and trials are identified by calculating the energy of the average evoked potential of each channel, and the energy of the average evoked potential of each trial. Then channel wise and trial wise median test is conducted to detect and remove non-responsive channels and trials. An artifact is defined as any signal that may lead to inaccurate classifier parameter estimation. Temporal domain artifact detection tests include:...........

Keywords: evoked potentials, energy, median, standard deviation, clip, kurtosis.

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Abstract: In digital logic and computing, a counter is a device which stores the number of times a particular event or process has occurred, often in relationship to a clock signal. CMOS devices are designed for high noise immunity and low static power consumption. CMOS accomplishes current reduction by complementing every nMOSFET with a pMOSFET and connecting both gates and both drains together. A high voltage on the gates will cause the nMOSFET to conduct and the pMOSFET to not conduct, while a low voltage on the gate causes the reverse. This arrangement greatly reduces power consumption and heat generation .Finally we proposed counter using SRAM model, provides the best resolution, high output current and good output-input current linearity.

Keywords: CMOS(Complementary Metal Oxide Semiconductor),MOSFET(Metal Oxide Semiconductor Field Effect Transistor), SRAM(Static Random Access Memory), TTL(Transistor Transistor Logic),VLSI(Very Large Scale Integrated Circuits).

[1]. A high speed digital CMOS Divide-by-N frequency divider by S.Abdel-Hafeez,S Harb,W.Eisenstadt - 2008.
[2]. A Digital CMOS parallel counter architecture based on state look- ahead logic‖ by S. Abdel- Hafez; A.Gordon-Ross -2011 .
[3]. A digital CMOS parallel counter Architecture for frequency Divider Based on transmission Gate Logic by Anil Kumar Choudhary,K pitambar patra - 2014.

Abstract: Encryption is important to keep the confidentiality of data. There are many of encryption algorithms to ensure the data, but should be the select the algorithm depended on the fast, strong and implementation. For that choose the advance encryption standard (AES) algorithm for encryption data because speed and easy implementation on small devices and some the feature for it. In this paper, implementation of encryption and decryption of AES algorithm is presented with a High Secured Low Power Multiplexer Look-Up-Table (MLUT) based Substitution-Box (S-Box)...............

Keywords: AES, Multiplexer LUT, S-Box, FPGA.

[1]. Ali Akbar Pammu, Kwen –Siong Chong, Kyaw Zwa Lwin Ne and Bah- Hwee Ghee, "High Secured Low Power Multiplexer-LUT Based AES S-Box Implementation",International Conference on Information Systems Engineering 2016.
[2]. Chandrasekhar Savalam1 & Prasanti Korapati, Assistant professor, ECE Dept., DIET College & Assistant professor, EIE Dept., VRSEC College "Implementation and Design of AES S-Box on FPGA" , IJRES, JAN-2015.
[3]. Gireesh Kumar .P and Mahesh Kumar, "Implementation of AES algorithm using Verilog", International Journal of VLSI and Embedded Systems-IJVES, Vol 04,June 2013.
[4]. Mahesh Walunjkar, Md. Manan Mujahid, Syed Anwar Ahmed, Ashish Jadhav ,"An AES-Core Development by Using Verilog" , IJIRCCE, Vol 04, June 2013.
[5]. Ahmed Tariq Sadiq, "Modification of AES algorithm based on Extended Key and Plain Text", Journal of Advanced Computer Science and Technology Research, Vol 5, 2015.

Abstract: A Kagome lattice hollow core photonic crystal fiber was filled by pumping pressurized inert gases (Argon, Krypton, Xenon) through the hollow core and wave guidance properties were observed for terahertz (THz) frequency. By using finite element method (FEM), effective material loss and confinement loss have been observed for different strut width, core diameter and different inert gases. Confinement of light has achieved through the hollow core for THz frequency. Lowest EML of 7.90x10-4 cm-1 is found for 5 μm strut width and 800 μm core diameter at 1 THz frequency for Xenon gas pumped at 1000 bar pressure. Observation and findings of this paper will contribute in the ongoing research trends on THz waveguide.

Keywords: Confinement loss, effective material loss (EML), hollow core kagome lattice PCF, inert gas.

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